Related posts:[CDNS – Cadence; SNPS – Synopsys] The evolution of the EDA industry (2/28/20)Simulation, CAD, and PLM: Part 1 (7/30/20)I.I’ve always found it conceptually helpful to think of a digital chip as a city, with buildings, roads, and the bustle of people mapping to IP blocks, wires, and the flow of electrons. Plus, look. A […]

It used to be that a chip engineer would design an integrated circuit by hand drawing a few dozen pages of schematics using standard templates, the resulting patterns X-ACTO knifed out of plastic film.  But with transistor density doubling every 18 months, this manual process couldn’t scale and was eventually replaced with a technology called […]